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MICROCIRCUIT MEMORY CMOS, DIGITAL, 256M X 8 BIT STACKED DIE (2GBIT) SYNCHRONOUS DRAM (SDRAM), MODULE

contributor authorDLA - CC - DLA Land and Maritime
date accessioned2017-09-04T18:38:43Z
date available2017-09-04T18:38:43Z
date copyright40150
date issued2009
identifier otherAKVLPCAAAAAAAAAA.pdf
identifier urihttp://mapnamagz.yabesh.ir/std;query=autho1826AF67FCdardstandardsfen/handle/yse/220450
description abstractThis drawing documents three product assurance class levels consisting of space application (device Class V), high reliability (device classes M and Q), and nontraditional performance environment (device Class N). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device Class N, the user is cautioned to assure that the device is appropriate for the application environment.Intended Use: Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
languageEnglish
titleSMD-5962-02518 REV Anum
titleMICROCIRCUIT MEMORY CMOS, DIGITAL, 256M X 8 BIT STACKED DIE (2GBIT) SYNCHRONOUS DRAM (SDRAM), MODULEen
typestandard
page35
statusActive
treeDLA - CC - DLA Land and Maritime:;2009
contenttypefulltext


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