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TIA TIA-644-A
Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits
Organization:
TIA - Telecommunications Industry Association
Year: 2012
Abstract: This Standard specifies the electrical characteristics of low voltage differential signaling interface circuits, normally implemented in integrated circuit technology, that may be employed when specified for the interchange of binary signals between:
Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE),
Data Terminal Equipment (DTE) and Data Terminal Equipment (DTE),
or in any point-to-point, or multidrop interconnection of binary signals between equipment.
The interface circuit includes a generator connected by a balanced interconnecting media to a load consisting of a termination impedance and a receiver(s). The interface configuration is a point-to-point or multidrop interface. The electrical characteristics of the circuit are specified in terms of required voltage, and current values obtained from direct measurements of the generator and receiver (load) components at the interface points.
The logic function of the generator and the receiver is not defined by this Standard, as it is application dependent. The generators and receivers may be inverting, non-inverting, or may include other digital blocks such as parallel-to-serial or serial-to-parallel converters to boost the data signaling rate on the interchange circuit as required by the application.
Minimum performance requirements for the balanced interconnecting media are furnished. Guidance is given in Annex A, Section A.2 with respect to limitations on data signaling rate imposed by the parameters of the cable length, attenuation, and crosstalk for individual installations for a typical cable media interface.
It is intended that this Standard will be referenced by other standards that specify the complete interface (i.e., connector, pin assignments, function) for applications where the electrical characteristics of a low voltage differential signaling interface circuit is required. This Standard does not specify other characteristics of the DTE-DCE interface (such as signal quality, protocol, maximum data signaling rate, bus structure, and/or timing) essential for proper operation across the interface.
When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those standards and specifications must determine and specify those optional features which are required for that application.
Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE),
Data Terminal Equipment (DTE) and Data Terminal Equipment (DTE),
or in any point-to-point, or multidrop interconnection of binary signals between equipment.
The interface circuit includes a generator connected by a balanced interconnecting media to a load consisting of a termination impedance and a receiver(s). The interface configuration is a point-to-point or multidrop interface. The electrical characteristics of the circuit are specified in terms of required voltage, and current values obtained from direct measurements of the generator and receiver (load) components at the interface points.
The logic function of the generator and the receiver is not defined by this Standard, as it is application dependent. The generators and receivers may be inverting, non-inverting, or may include other digital blocks such as parallel-to-serial or serial-to-parallel converters to boost the data signaling rate on the interchange circuit as required by the application.
Minimum performance requirements for the balanced interconnecting media are furnished. Guidance is given in Annex A, Section A.2 with respect to limitations on data signaling rate imposed by the parameters of the cable length, attenuation, and crosstalk for individual installations for a typical cable media interface.
It is intended that this Standard will be referenced by other standards that specify the complete interface (i.e., connector, pin assignments, function) for applications where the electrical characteristics of a low voltage differential signaling interface circuit is required. This Standard does not specify other characteristics of the DTE-DCE interface (such as signal quality, protocol, maximum data signaling rate, bus structure, and/or timing) essential for proper operation across the interface.
When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those standards and specifications must determine and specify those optional features which are required for that application.
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| contributor author | TIA - Telecommunications Industry Association | |
| date accessioned | 2017-09-04T17:06:35Z | |
| date available | 2017-09-04T17:06:35Z | |
| date copyright | 02/01/2001 (R 2012) | |
| date issued | 2012 | |
| identifier other | YFPPFFAAAAAAAAAA.pdf | |
| identifier uri | http://mapnamagz.yabesh.ir/std;query=autho1826AF676/handle/yse/130169 | |
| description abstract | This Standard specifies the electrical characteristics of low voltage differential signaling interface circuits, normally implemented in integrated circuit technology, that may be employed when specified for the interchange of binary signals between: Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE), Data Terminal Equipment (DTE) and Data Terminal Equipment (DTE), or in any point-to-point, or multidrop interconnection of binary signals between equipment. The interface circuit includes a generator connected by a balanced interconnecting media to a load consisting of a termination impedance and a receiver(s). The interface configuration is a point-to-point or multidrop interface. The electrical characteristics of the circuit are specified in terms of required voltage, and current values obtained from direct measurements of the generator and receiver (load) components at the interface points. The logic function of the generator and the receiver is not defined by this Standard, as it is application dependent. The generators and receivers may be inverting, non-inverting, or may include other digital blocks such as parallel-to-serial or serial-to-parallel converters to boost the data signaling rate on the interchange circuit as required by the application. Minimum performance requirements for the balanced interconnecting media are furnished. Guidance is given in Annex A, Section A.2 with respect to limitations on data signaling rate imposed by the parameters of the cable length, attenuation, and crosstalk for individual installations for a typical cable media interface. It is intended that this Standard will be referenced by other standards that specify the complete interface (i.e., connector, pin assignments, function) for applications where the electrical characteristics of a low voltage differential signaling interface circuit is required. This Standard does not specify other characteristics of the DTE-DCE interface (such as signal quality, protocol, maximum data signaling rate, bus structure, and/or timing) essential for proper operation across the interface. When this Standard is referenced by other standards or specifications, it should be noted that certain options are available. The preparer of those standards and specifications must determine and specify those optional features which are required for that application. | |
| language | English | |
| title | TIA TIA-644-A | num |
| title | Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits | en |
| type | standard | |
| page | 42 | |
| status | Active | |
| tree | TIA - Telecommunications Industry Association:;2012 | |
| contenttype | fulltext |